Test chip implementation engineer

Posted 5 years ago

Educational Qualifications : 
BS/B. Tech or MS/M. Tech

Job Requirements

Essential Technical Skills: 

  • At least 3 years of relevant SoC Physical Design implementation experience with contribution in multiple tape out
  • Experience in top and(or) block) level floorplanning, Place and Route, CTS, logical and physical optimization, timing closure, power and signal integrity, design physical verification (LVS and DRC), functional verification etc.
  • Experience in working with Cadence SoC Encounter (EDI) and caliber.
  • Working knowledge of scripting languages like Perl, Tcl, shell scripting

Desirable Skills: 

  • Understanding of verilog based digital design and coding.
  • Knowledge of Industry standard verification tools for simulation and debug
  • Fundamental understanding of Design For Manufacturability (DFM)
    Familiarity with spice simulation tools e.g. HSpice/HSIM
  • Understanding and working experience in static and dynamic IR-drop analysis.

Personal Skills: 

  • Enthusiastic, self-motivated, flexible with strong inter-personal skills
  • Demonstrate good team player attitude to earn trust from all the colleagues working around you.
  • High degree of initiative, innovation and thinking out-of-the-box attitude
  • Capable of working directly with customers and maintain customer satisfaction
  • Able to handle stress in the high pressure tape-out time and able to multi-tasking when required.
  • Good communication skills, both oral and written

Job Features

Job CategoryImplementation engineer

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